Brannon Batson is the latest hardware engineer to defect from DE Shaw to high-frequency trading giant Hudson River Trading (HRT) as the firm continues to deepen its investment in ASIC-based infrastructure, according to a report by eFinancial Careers.

Batson, a veteran hardware engineer who spent over 20 years at DE Shaw, was instrumental in developing all three generations of Anton, the fund’s bespoke biotech supercomputer powered by custom ASIC chips.

Batson joins a growing list of DE Shaw alumni now at HRT, including Jeffrey Butts, another long-time engineer and co-inventor of a patented mult-ibody simulation system used in Anton 3. Though their specific roles at HRT are undisclosed, their expertise suggests continued focus on ASIC hardware development—a hallmark of ultra-low latency trading.

HRT’s hiring spree signals a renewed commitment to pure high-frequency strategies, even as some peers explore slower trading models. ASICs, while less flexible than FPGAs, offer unmatched speed advantages critical for competitive edge in HFT.